Two decades ago, if you spoke of high-speed data rate, you were in all probability referring to 3 Gbps. Today, of course, engineers can be dealing with as much as 25Gbps. While we are pushing for faster rates, we are also parallelly making smaller devices given the trend of miniaturization.
With high speed also come a number of challenges, primary among them being interference. In fact the faster the data rates, the harder it can get to protect the integrity of signals.
Making your high-speed board design project success, therefore, involves paying attention to a number of factors.
This might sound like an obvious thing to do, but the fact remains that without a proper plan in place you are likely to suffer a whole lot of setbacks. The plan needs to include aspects such as:
It is important to determine which material you will be using for the board and what are the specific constraints that need to be followed in terms of the design rules. FR4, for example, works well when you are working with speeds PCB material has been chosen, layer stackup strategies need to be kept in mind. Some of these include:
The ground plane should not be split with any routed signals. Split it can lead to EMI and signal timing issues. In case a ground plane has to be split, a 0 Ohm resistor needs to be added.
With high-speed designs since the board real estate is at a premium, you need to save space. To this end, the minimum oversize of the pads should be kept at 0-5% of the size of the component pins. Also, the less the space given to vias, the more room there is for differential pairs, vias and more.
To ensure that signals do not interfere with each other or with any component, some of the guidelines to be followed include:
Using vias to return currents to their termination is recommended. Ensure also that the vias are impedance matched, differential vias. Return vias also need to be placed close to signal vias.
The 3W rule comes in handy to minimize coupling. The rule states that the separation between traces must be equal to three times the width of a single trace from center to center.
To prevent coupling between power and ground planes, it is advisable to sue the 20H rule. It states that the power plan must be made 20 times smaller than the dielectric thickness between adjacent power & ground planes.
When it comes to routing guidelines, the following tips will come in handy:
Overall arming yourself with strategies and knowledge to combat issues such as interference can go a long way in maintaining integrity of signals. Choosing the right electronics contract manufacturer who has the necessary experience, expertise and access to industry best practices is something that you must do in order to make your high-speed design successful.
We have over 4 decades of experience in providing innovative high-speed PCB design & manufacturing services. We take an extra step to reach out to your exact PCB manufacturing requirements, high-quality standards, and a strong customer support service to provide quick turnarounds and on-time delivery to our customers. In case you have any questions, please feel free to contact us via email at sales@technotronix.us or call us on 714/630-9200.
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